Synopsys is hiring an Applications Engineer in Mountain View, CA. The IP FAE will provide expert technical support to field applications and sales teams, to drive pre-sales customer engagements of Synopsys IP (Intellectual Property) products to successful technical closure. The role requires working with customers, sales, marketing, corporate applications engineering, and product R&D teams from different locations. IP FAE will be involved in customer meetings to understand customers’ technical requirements for IP, and will be responsible for supporting the engagements via on-site or remote technical interactions and regular meetings, providing demos, supporting evaluations, resolving technical issues, addressing competitive challenges, and regularly communicating status during the engagement. IP FAEs also provide field inputs to product teams on competitive data and new feature requirements, based on customer engagement experiences.
General Responsibilities Include:
Collaborating with the sales & marketing team to identify and understand our customers’ technical & business challenges. Develop appropriate strategies & solutions for customers, leveraging the broad Synopsys IP portfolio.
Educating our customers on how the IP products meet their needs, and helping them evaluate it (with support from the product R&D teams) relative to their requirements.
Influencing the IP product development roadmap by communicating customer needs to the product R&D teams.
Supporting the engagements via on-site or remote technical interactions, providing demos, supporting evaluations, resolving technical problems, addressing competitive challenges, and regularly communicating status during the engagement.
BSEE with 8+ years of relevant experience, or MSEE with 7+ years of relevant experience
Good understanding of latest SoC architectures and system-level design practices for one or more market segments (mobile, storage, automotive, networking, IoT) particularly from IP requirements perspective
Familiarity with State-of-art SoC Design Implementation
RTL design and verification using Verilog or SystemVerilog
Synthesis and static timing analysis, physical design flow, testbench creation and simulation, some familiarity with analog/mixed-signal design and verification flows, and basic understanding of package and PCB design flows and technologies
Travel (~ 15-30%) required to visit customer, sales, and engineering locations
Strong Technical Communication Skills
Ability to understand and present complex technical requirements, problems, and solutions concisely in verbal and written communications
Ability to analyze, summarize and generate status updates from technical data
Ability to organize, conduct and co-ordinate meetings involving multiple teams internal and external
Nice to have:
Prior experience or technical familiarity with interface and connectivity protocols, e.g., USB, PCIe, DDR, MIPI, HDMI, SATA, Ethernet, and AMBA.
Prior experience in selecting, using, designing, or supporting internal or external IP
Prior experience in an application engineering or another direct customer facing role
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Synopsys provides the world’s most advanced tools for silicon chip design, verification, IP integration, and application security testing.
Open PTO; high-powered laptop with dual external displays; modern, open concept; office snacks in the kitchen; games for break time.
Java, C, C++, Python, SQL
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