TITLE: Senior ASIC Design Engineer
DIVISION: Kyocera Document Solutions Development
DEPARTMENT: Hardware Engineering
LOCATION: Gardena, California
POSITION REPORTS TO: Department Manager- Hardware Engineering
SUMMARY OF RESPONSIBILITY:
This person will be designing complex algorithms and imaging IP for rendering and image processing
MAJOR DUTIES AND RESPONSIBILITIES:
Perform design tasks with high complexity using Verilog/System Verilog/SystemC.
Design/verify imaging sub-components and intellectual property.
Perform White-Box verification using Verilog, SystemVerilog, and PERL languages.
Coordinate with design, verification, and software engineers to complete assigned tasks.
Perform engineering analysis and design of digital circuits or systems with high complexity.
Generate detailed design specifications from complex design notes.
Lead and direct other engineers.
Contribute patentable ideas and design.
Take directions from the project or department manager.
Work independently with minimal technical supervision.
BS in EE or CS or Math with 10+ years of experience, MS with 5+ years of experience.
Synopsys tool experience is a must.
Familiarity with imaging processing algorithms
Familiarity with compression technologies including JPEG/JPEG 2000, ALDC, and others
Proficient in one or more of C/C++, MatLab, SystemC
Proficient in one or more of System Verilog, Verilog, Perl
Familiarity with ASIC design process
Good oral and written communication skills
Essential Physical Functions:
· Occasional lifting of computer, monitor, or small printer no heavier than 40 pounds.
· Typing, writing, reading
· Seeing, hearing and speaking, both nearby and at a distance
· Frequent sitting
· Standing, walking, kneeling.
This is a general description of the duties and responsibilities most frequently required of this position. The company may from time to time request that the incumbent perform other related tasks and assume reasonable responsibilities that have not been specifically included in this description.
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